Hackaday

Hands-On With New Arduino FPGA Board: MKR Vidor 4000

Hackaday brought you a first look the Arduino MKR Vidor 4000 when it announced. Arduino sent over one of the first boards so now we finally have our hands on one! It’s early and the documentation is ...
Semiconductor Engineering

FPGA VHDL Verification

This is actually possible – and with an average efficiency improvement of 20% to 50% for medium to high complexity FPGAs. Less for data path oriented designs and more for control or protocol oriented ...
Hackaday

FPGA Snake Game Uses No VHDL At All

We’re really not supposed to start a feature like this; but this hack is awesome. It’s a game of Snake implemented by an FPGA dev board. It uses a 16×16 LED matrix as the display and an SNES ...
Electronic Design

Verification Techniques For FPGA Designs

With the increasing size and complexity of FPGA devices, there is a need for more efficient verification methods. Timing simulation can be the most revealing verification method; however, it is often ...
Semiconductor Engineering

Trends In FPGA Verification Effort And Technology Adoption

The more we know about the bigger picture, context, historical and projected trends, or simply how other people do the same thing we do, the more efficiently and successfully we can do our specific ...
mccormick.northwestern.edu

COMP_ENG 355: ASIC and FPGA Design

This course will introduce students to practical design methodologies for developing applications for FPGAs and ASICs. You will learn the fundamentals for FPGA and ASIC design through software coding ...
TechRepublic

Design and Verification of VHDL Code for FPGA Based Slave VME Interface Logic

Versa Module Europa (VME) bus is used in various applications in order to ensure safety and security. VME64x based Real Time Computer (RTC) system with various types of Input /Output (I/O) hardware ...
EDN

Choosing a Real-Time Platform: FPGAs vs. Real-Time Operating Systems

FPGAs (FIELD-PROGRAMMABLE GATE ARRAYS) are ICs that contain large numbers of unconnected gates whose function you determine by downloading to the FPGA a wiring list that determines how the gates ...